pin PCE in register PLLCTL is not defined -- is there a problem?

pin PCE in register PLLCTL is not defined -- is there a problem?

Post by codewarr20 » Fri, 11 Jun 2004 01:49:57


I notice that in IO_map.h the pin PCE in register PLLCTL is not
defined. Does this function not work in CodeWarrior and that is why
it is not defined?
(MC68HC9S12DP256)
 
 
 

pin PCE in register PLLCTL is not defined -- is there a problem?

Post by MW Ro » Fri, 18 Jun 2004 02:02:17

In article < XXXX@XXXXX.COM >,



My apology for the delay in replying. You are correct, this pin is not
included in the register definition of PLLCTL, along with pin PRE. These
pins both relate to functionality during Pseudo-Stop Mode. Not sure why
they aren't listed, other than to venture a guess that Pseudo-Stop Mode
is rarely used. You can modify his register map so that these pins are
defined, as we have done below. The new additions are separated:

/*** PLLCTL - CRG PLL Control Register; 0x0000003A ***/
typedef union {
byte Byte;
struct {
byte SCME :1; /* Self-clock mode enable */

byte PCE :1;
byte PRE :1;

byte :1;
byte ACQ :1; /* Acquisition */
byte AUTO :1; /* Automatic Bandwidth Control */
byte PLLON :1; /* Phase Lock Loop On */
byte CME :1; /* Crystal Monitor Enable */
} Bits;
} PLLCTLSTR;
extern volatile PLLCTLSTR _PLLCTL @(REG_BASE + 0x0000003A);
#define PLLCTL _PLLCTL.Byte
#define PLLCTL_SCME _PLLCTL.Bits.SCME

#define PLLCTL_PCE _PLLCTL.Bits.PCE
#define PLLCTL_PRE _PLLCTL.Bits.PRE

#define PLLCTL_ACQ _PLLCTL.Bits.ACQ
#define PLLCTL_AUTO _PLLCTL.Bits.AUTO
#define PLLCTL_PLLON _PLLCTL.Bits.PLLON
#define PLLCTL_CME _PLLCTL.Bits.CME


Again sorry for the delay it took in replying.

Ron

--
Metrowerks, one of the world top 100 companies and influencers
in the software development industry. - SD Times May 2004
http://www.yqcomputer.com/

Metrowerks, maker of CodeWarrior
Ron Liechty - XXXX@XXXXX.COM - http://www.yqcomputer.com/