Ok, you are the second person telling me to use a fixed-point
representation, then it must be the way it has to be done... :o)
Let's consider the problem from scratch.
Let's suppose that I want to implement a 64-QAM symbol mapper.
This means that every 6 input bits the mapper has to output the
correspondent symbol, that consist af a real and an imaginary part. The
problem is to choose the representation of each of these numbers. We
know that each number can be one of the following: -7, -5, -3, -1, 1,
3, 5, 7. The 802.11a standard says that we must consider a correction
factor of 1/sqrt(42) that is approximately 0.154. Then we have to
multiply all the above mentioned numbers for this factor. Then, we are
not dealing with integer numbers! After this, to make it simple, we
have to apply the 64-point fft to 64 complex numbers (made up of two
real numbers of the type described above). The problem is now to
understand how to represent these numbers. I had a look at a master
thesis (not so good thesis, I must say). It considers all these numbers
represented in 32 floating-point format. That means, for example in the
64-QAM mapper, we have a ROM that outputs the correspondent 32 floating
point symbols (32+32 for real and imaginary part) according to the 6
input bits. With a floating-point representation the ROM outputs
exactly the calculated values. If I want to use a fixed-point
representation, how should I convert the non-integer numbers to
fixed-point numbers? And furthermore, what about the output of the IFFT
block, how should I interpret the fixed-point output numbers?
It's clear that I have few ideas but well-confused... :o)
But that's why I started this post.... :o)))
Can you go more in detail?
I think the Viterbi decoder is another critical part.
I WANT, I WANT! :o)))))))
But probably other people are interested and can contribute on the