[ISE7.1] Equivalent register removal + register duplication + register balancing

[ISE7.1] Equivalent register removal + register duplication + register balancing

Post by Tim Verstr » Sat, 10 Dec 2005 00:37:11


When all of these options (equivalent_register_removal +
register_duplication + register_balancing) are enabled, they all work
fine and do what they are supposed to do ... but because i don't want
it to remove the equivalent registers, i disabled this option but now
because of disabling equivalen_register_removal both
register_duplication and register_balancing don't do anything anymore?
... are all of these features heavily related to each other????

thanks in advance for your reply,

kind regards,

Tim Verstraete

1. UPDATE register, sessions SET register.privatedata=%s WHERE register.sid=%s AND sessions.exp>%s

2. Equivalent Register Removal in XST


I have this in my .syr report file from XST:

Set property "equivalent_register_removal = no" for signal <foo>.
Set property "equivalent_register_removal = no" for signal <bar>.
Register <bar> equivalent to <foo> has been removed

I really don't understand why bar and foo are being merged when the
tool knows they are not supposed to be.
Can anyone please tell me how I can stop registers from being merged?

I think this code used to work properly, and the problem may be due to
a bug in XST 6.2.3.

BTW, the relevant Verilog source is:

// synthesis attribute equivalent_register_removal of foo is no;
// synthesis attribute equivalent_register_removal of bar is no;

reg foo;
reg bar;

always @(posedge clk)
foo <= froboz;
bar <= froboz;


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