I assume you are dealing with the transition from "real" mode to
"protected" mode. In real mode the interrupt table was hard-wired
(actually microcoded) to address 0.
For protected mode, a group of registers was added to control the
system behavior. These registers are only accessible by the kernel
(ring 0). The relevant register is the interrupt descriptor table
register (IDTR). This register holds an address to the start of the
table. The table has an entry for each interrupt vector (for both
physical and software interrupts).
developer.intel.com used to be a good place to find the specs, but
everything has been reshuffled. A quick search brought up:
which is for the Pentium 4. The relevant manuals are volume 3 (system
Hope that helps!