Call for Papers, IEEE ISQED 2006

Call for Papers, IEEE ISQED 2006

Post by ISQE » Wed, 31 Aug 2005 07:01:07


ISQED 2006, 7th International Symposium on


March 27-29, 2006. San Jose, CA, USA

ISQED is the pioneer and leading international conference dealing with the
design for manufacturability and quality issues front-to-back. ISQED spans
three days, Monday through Wednesday, in three parallel tracks, hosting near
100 technical presentations, six keynote speakers, two-three panel
discussions, workshops /tutorials and other informal meetings. Conference
proceedings are published by IEEE Computer Society and hosted in the digital
library. Proceedings CD ROMs are published by ACM. In addition, continuing
the tradition of reaching a wider readership in the IC design community,
ISQED will continue to publish special issues in leading journals. The
authors of high quality papers will be invited to submit an extended version
of their papers for the special journal issues.

Papers are requested in the following areas
A pioneer and leading multidisciplinary conference, ISQED accepts and
promotes papers related to the design and manufacturing of quality-based
integrated circuits and systems, from design concept to production and all
key steps between. Authors are invited to submit papers in the various
disciplines of high level design, circuit design, test & verification,
design automation tools; processes; and flows, device modeling,
semiconductor technology, and advance packaging. Authors are further
encouraged to highlight the link between their subject of interest to the
overall design flow chain and address the design quality aspects of the
subject (e.g.,. performance, power, yield, reliability, manufacturability,
time to market , and environmental considerations, etc.).

Design for Manufacturability & Quality (DFMQ)
Analysis, modeling, and abstraction of manufacturing process parameters and
effects for highly predictable silicon performance. Design and synthesis of
high complexity ICs: signal integrity, transmission line effects, OPC,
phase shifting, and sub-wavelength lithography, manufacturing yield and
technology capability. Design for diagnosability, defect detection and
tolerance; self-diagnosis, calibration and repair. Design and
manufacturabilty issues for Digital, analog, mixed signal, RF, MEMS,
opto-electronic, biochemical-electronic, and nanotechnology based ICs.
Redundency and other yield improving techniques. Design quality definitions
and standards; design quality metrics to track and assess the quality of
electronic circuit design, as well as the quality of the design process
itself; design quality assurance techniques. Global, social, and economic
implications of design quality. Design metrics, methodologies and flows for
custom, semi-custom, ASIC, FPGA, RF, memory, networking circuit, etc. with
emphasis on quality. Design metrics and quality standards for SoC, and SiP.

Package - Design Interactions & Co-Design (PDI)
Concurrent circuit and package design and effect on quality. Packaging
electrical and thermal modeling and simulation for improved quality of
product. SoC versus system in a package (SiP): design and technology
solutions and tradeoffs; MCM and other packaging techniques; heat sink

Design Ver