hai all,

i am having problems with the usage of real type signals.Based on the

code the real value in the SimVision waveform viewer is required to

change discretely but it is changing continuously.The code looks

simple but i am clueless about the problem.

Description of the problem:

i am trying to desing a simple bit to real converter ( a simple dac).A

bit_real function convertes the bit vector to real value.

Code:

_____________________________________________________________________

library ieee;

use ieee.electrical_systems.all;

entity tester is

generic ( constant BITS: integer:=16;

constant REFER: real:=5.0);

port ( signal Input : in bit_vector(BITS-1 downto 0) ;

signal actual_val:out real);

end entity tester;

architecture realtest of tester is

signal over: bit;

signal a1: real:=0.0;

function bit_real(inp : bit_vector; ref: real) return real is

variable value:integer:=0;

variable i: integer:=0;

variable result: real:=0.0;

begin

for i in BITS-1 downto 0 loop

if inp(i)='1'then

value:=value*2+1;

else

value:=value*2;

end if;

end loop;

result:=ref*real(value)/real(2**BITS-1);

return result;

end bit_real;

begin

calc: process(Input)is

begin

a1<=bit_real(Input,REFER);

end process;

actual_val<=a1;

end architecture;

Testbench:

___________________________________________________________________

library ieee;

use ieee.electrical_systems.all;

entity toptest is

end entity;

architecture tb of toptest is

constant BITS:integer:=16;

signal inptb :bit_vector(BITS-1 downto 0);

signal outtb :real:=0.0;

begin

d2a: entity work.tester(realtest)

port map( Input=>inptb,actual_val=>outtb);

inp: process

begin

inptb<="1000000000000000";

wait for 3 ns;

inptb<="1100000000000000";

wait for 3 ns;

inptb<="1111000000000000";

wait for 3 ns;

wait;

end process;

end architecture;

This code was compiled & elaborated using ncvhdl & ncelab with -ams &

-v93 option. and simulated using the ncsim, with the following analog

control file

simulator lang=spectre

saveNodes options save=all rawfmt=sst2 rawfile="tran1.tran"

tran1 tran stop=10ns errpreset=moderate maxiters=10 cmin=10f

Output:

Here it is required that the value of a1 & actual_val to change only

when the input is changing, i.e must remain at constant value (2.5)

till the first 3ns. But it dosent happen so,.. the curve looks like

there is some kind of slew associated with it .. the value of a1 and

actual_val raises almost like a Ramp to the next value

I just dont know if i am missing out anything.The bit_real function is

not overloaded anywhere in my design or the work library.What could be

the reason for this problem?,Should i specify the max time step, or

any other options?

It will be great if anybody can answer this question.

Thanks

Manivannan

DPL

Univ of Cincinnati

OH:45220,USA

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