Yeah, OISC machines. While they can be implemented with an impressively small
number of transistors, the memory bandwidth is prohibitive; each 'instruction'
consists of three words (source address, address of value to subtract, address
to jump to on borrow) and the 'instructions' are so primitive that you need to
churn your way through lots of them to achieve anything.
Indeed. I designed an ISA like this once when I was feeling bored; it exposed
all the internal devices, and each 'instruction' consisted of
pick-up-value-at-this-internal-address, write-to-that-internal-address. It
allowed a number of interesting features, like multiple ALUs and memory access
devices; but it was extremely interesting that when I tried hand-rolling some
code for it, the code density was extremely similar to that of traditional
Now all I need to do is to learn enough VHDL to implement one. (Or, more
likely, discover out why it wouldn't work.)
€ €€€ http://www.yqcomputer.com/
"There does not now, nor will there ever, exist a programming language in
which it is the least bit hard to write bad programs." --- Flon's Axiom