Peter Nielsen Is A CON Artist [WAS: PMView's stable - IT IS STABLE!]

Peter Nielsen Is A CON Artist [WAS: PMView's stable - IT IS STABLE!]

Post by The OS/2 G » Thu, 09 Oct 2003 09:30:07

Peter Nielsen: lied to OS/2 users by telling them he would
give them a lifetime of upgrades if they would buy his product.
They believed him, supported him, and bought his product.

Peter Nielsen promptly laughed in their faces, renamed his
product and claimed the 'lifetime of upgrades' would not be

Peter Nielsen is a con artist and nothing less.

Tim Martin, The OS/2 Guy
Warp City Web Site -
From his Warp 4.53 ThinkPad T40 w/2GIG of RAM,
80GIG of Hard Disk and IBM's Web Browser for OS/2

1. AM/AM, AM/AM Modeling

2. Am I seeing meta-stable or what?

It happens in a Virtex-E

There's a 1M cycles test pattern on a 10 bit data bus with an ENABLE
signal (high for 1 M cycles) indicates data valid. The pattern is
clocked at 40 MHZ (0_degree)

The data & enable is then fed into an accumulator with input
registered. The ACC does the sum for exact 1M cycles. The ACC and its
input register is clocked with the 90 degree phase shift

The 0_degree and 90_degree clocks are DLL outputs (please dont ask why
it has to cross to the 90 degree). DLL has been locked long time
before ACC start (enbale high)

PAR post timing well passes the 40 MHz constraint

Here's what happens

The accumulator once a while (about 1 out of 100) gives a random wrong
result. If I put another 90 degree clocked register before the ACC,
it fixes the problem. it seems not the setup time violation since 25/4
= 6.25ns is much longer than the requirement

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