I in the process of adding realistic processor instruction cycle
timing to the Transputer Emulator ( http://www.yqcomputer.com/
transputeremulator/) and have a query concerning internal channel
According to the T414 datasheet an nor utinstruction will take
2w + 19 processor cycles (where w is number of words in the message).
So if a process (called P) is executing an utinstruction using an
internal channel, and a process (called Q) is executing an n
instruction using the same internal channel, do both processes
instructions 2w + 19 processor cycles to complete?
Obviously, there is a memory transfer to move the data from the
destination specified by the ninstruction, which I can see is 2w,
but why both instructions 2w?
Hence is it the actual case that utinstruction takes 19 processor
cycles, and the ninstruction takes 2w + 19 processor cycles?